DocumentCode
3381861
Title
Foreground digital calibration of non-linear errors in pipelined A/D converters
Author
Adel, Hussein ; Dessouky, Mohamed ; Louerat, Marie-Minerve ; Gicquel, Hugo ; Haddara, Hisham
Author_Institution
LIP6 Lab., Pierre & Marie Curie Univ., France
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
569
Lastpage
572
Abstract
A foreground digital calibration technique for pipelined ADC is proposed which accounts for linear error correction, while an error estimation technique for amplifier non-linearity is suggested as a reference for non-linear error correction. The calibration algorithm is based on applying a slow input to the ADC to automatically correct for linear errors, while depending on the accuracy of Digital Error Correction (DEC) to estimate and correct for non-linear errors. The proposed calibration scheme is demonstrated for an 11 bit pipelined ADC, and gives SNDR improvement over 30 dB, while using low specifications residue amplifier to reduce power consumption.
Keywords
amplifiers; analogue-digital conversion; calibration; error correction; nonlinear estimation; amplifier nonlinearity estimation; digital error correction; error estimation technique; foreground digital calibration technique; linear error correction; low specification residue amplifier; nonlinear error correction; pipelined A/D converters; pipelined ADC; power consumption reduction; word length 11 bit; Analog circuits; Calibration; Digital circuits; Energy consumption; Error analysis; Error correction; Laboratories; Nonlinear distortion; Redundancy; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5537533
Filename
5537533
Link To Document