DocumentCode
3382536
Title
Failure analysis of design qualification testing: 2007 VS. 2005
Author
Tamizhmani, G. ; Li, B. ; Arends, T. ; Kuitche, J. ; Raghuraman, B. ; Shisler, W. ; Farnsworth, K. ; Gonzales, J. ; Voropayev, A. ; Symanski, P.
Author_Institution
Arizona State University Photovoltaic Testing Laboratory (ASU-PTL), 7349 East Unity Avenue, Mesa, 85212 USA
fYear
2008
fDate
11-16 May 2008
Firstpage
1
Lastpage
4
Abstract
The design/performance qualification testing is a set of well-defined accelerated stress tests with strict pass/fail criteria. ASU-PTL is an ISO 17025 accredited testing laboratory and has been providing photovoltaic testing services since 1992. This paper presents a failure analysis on the design qualification testing of both crystalline silicon (c-Si) and thin-film technologies for two consecutive periods: 1997–2005 & 2005–2007. In the first period, the industry was growing at a slower rate with traditional manufacturers and the qualification testing of c-Si technologies was primarily conducted per Edition 1 of IEC 61215 standard. In the second period, the industry was growing at an explosive rate with new manufacturers joining the traditional manufacturers and the qualification testing of c-Si was primarily conducted per Edition 2 of IEC 61215. Similar failure analysis according to IEC 61646 has been carried out for the thin-film technologies as well. The failure analysis of the test results presented in this paper indicates a large increase in the failure rates for both c-Si and thin-film technologies during the period of 2005–2007.
Keywords
Failure analysis; IEC standards; ISO standards; Laboratories; Life estimation; Manufacturing industries; Qualifications; Stress; Testing; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Photovoltaic Specialists Conference, 2008. PVSC '08. 33rd IEEE
Conference_Location
San Diego, CA, USA
ISSN
0160-8371
Print_ISBN
978-1-4244-1640-0
Electronic_ISBN
0160-8371
Type
conf
DOI
10.1109/PVSC.2008.4922768
Filename
4922768
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