DocumentCode
3382641
Title
Integration of information security chips based on System-in-Package
Author
Ran, Tong ; Bai, Guoqiang
Author_Institution
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear
2011
fDate
25-28 Oct. 2011
Firstpage
625
Lastpage
628
Abstract
A bottleneck problem exists in the information security chips, that it´s hard to integrate the logic chips or blocks with the memory together. System-in-Package (SiP) is a technology that combining multiple actives and passives electronic components, assembled in a single unit that provides multiple functions associated with a system. In this paper, the concept “integration of information security chips based on SiP” is proposed, in order to solve the bottleneck problem above, and bring better performance on high-quality, lower-power consumption and high-reliability. The detailed development flow for “integration of information security chips based on SiP” is put forward, and some key issues like the verification methods are also expounded. According to this flow, a product of SiP integrating a CPU, a flash memory and a RSA cryptographic chip is designed. The function and properties of the product satisfy the requirement, thus certificating the feasibility of this development flow. And the SiP technology conforms to the trends of small-sized and high-dependability for information security device.
Keywords
flash memories; logic circuits; logic design; low-power electronics; public key cryptography; system-in-package; CPU; RSA cryptographic chip; SiP; actives electronic components; flash memory; information security chips; information security device; logic chips; passives electronic components; system-in-package; Cryptography; SiP; compatibility; information security chip;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location
Xiamen
ISSN
2162-7541
Print_ISBN
978-1-61284-192-2
Electronic_ISBN
2162-7541
Type
conf
DOI
10.1109/ASICON.2011.6157283
Filename
6157283
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