A novel low THD 4-quadrant analog multiplier using feedforward compensation for PFC

A novel 4-quadrant analog multiplier for PFC converters is presented based on CSMC 0.5μm BCD process. Gilbert cell is utilized to increase the dynamic input voltage range. The feedforward control technology is introduced to add 1/V² to the multiplier output signal, where V in proportional to the input line voltage of PFC. This feedforward control cell efficiently compensates the loop gain of PFC and supplies more conversion energy to reduce THD. The simulated results show that the multiplier has an input voltage range of 0~3V when the reference signal of the inner voltage loop changes from 0 to 5.5V, THD is less than 0.75%. The proposed multiplier has a good linearity and a low THD.