DocumentCode
3384975
Title
A routing architecture exploration for coarse-grained reconfigurable architecture with automated seu-tolerance evaluation
Author
Imagawa, Takashi ; Hiromoto, Masayuki ; Ochi, Hiroyuki ; Sato, Takashi
Author_Institution
Grad. Sch. of Inf., Kyoto Univ., Kyoto, Japan
fYear
2010
fDate
27-29 Sept. 2010
Firstpage
248
Lastpage
253
Abstract
Coarse-grained reconfigurable architectures are promising components in future SoCs. They are advantageous over fine-grained FPGAs in terms of tolerance for Single-Event Upset (SEU) as well as area and energy efficiency because they have much smaller amount of configuration SRAMs. To establish a design methodology for coarse-grained reconfigurable architecture for specific application domain, this paper compares coarse-grained reconfigurable fabrics of different routing architectures and shows that reconfigurable architecture with excessive routing resources is not preferable when SEU-tolerance is more important than circuit area.
Keywords
SRAM chips; network routing; power aware computing; reconfigurable architectures; system-on-chip; SoC; area efficiency; automated SEU-tolerance evaluation; coarse-grained reconfigurable architecture design; configuration SRAM; energy efficiency; routing architecture; single-event upset; Circuit faults; Computer architecture; Integrated circuit reliability; Reliability engineering; Routing; Tunneling magnetoresistance;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference (SOCC), 2010 IEEE International
Conference_Location
Las Vegas, NV
ISSN
Pending
Print_ISBN
978-1-4244-6682-5
Type
conf
DOI
10.1109/SOCC.2010.5784754
Filename
5784754
Link To Document