• DocumentCode
    3387125
  • Title

    Electromigration test on via line structure with a self-heated method

  • Author

    Yap, H.K. ; Yap, H.K. ; Tan, Y.C. ; Lo, K.F.

  • Author_Institution
    Chartered Semicond. Manuf., Singapore, Singapore
  • fYear
    2002
  • fDate
    21-24 Oct. 2002
  • Firstpage
    162
  • Lastpage
    164
  • Abstract
    A number of fast wafer level electromigration test techniques, isothermal, constant current and SWEAT are widely used for interconnect reliability evaluation and process monitoring. In this paper, we present data from alternative wafer level EM technique, self-heated electromigration test on via chain structure. The self-heated test methodology gives the ability to independently control both stress temperature and current density. In addition, a comparison of self-heated via test and conventional package level test has been done. Furthermore, we also successfully demonstrate that this technique is an effective tool for process improvement and optimization.
  • Keywords
    electromigration; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; electromigration test; interconnect reliability; package-level test; process monitoring; process optimization; self-heated method; via line structure; wafer-level test; Automatic testing; Current density; Electromigration; Life estimation; Packaging; Stress control; System testing; Temperature control; Thermal stresses; Wafer scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop Final Report, 2002. IEEE International
  • Print_ISBN
    0-7803-7558-0
  • Type

    conf

  • DOI
    10.1109/IRWS.2002.1194258
  • Filename
    1194258