A testbed for evaluating undersampling techniques

A testbed was designed and constructed to evaluate the performance of high-speed, wideband analog-to-digital converters (ADCs) and external track-and-hold devices for applications involving undersampling. The testbed included a digital processing board which implemented demultiplexing and digital quadrature down-conversion to generate baseband components from the ADC output signal. A data collection board provided the means to capture data and transfer it to a PC for offline processing. Analog Devices´ AD9020 ADC and AD9100 external track-and-hold devices were evaluated in the testbed. Performance of the ADC device was evaluated in terms of spurious free dynamic range and linearity. A spurious free dynamic range of better than 45 dB was achieved with the 10-bit ADC sampling a carrier frequency of 72.5 MHz at a 10-MHz rate. A dynamic range of greater than 50 dB with a linearity error of less than 2 dB was measured for the same device