Parallel error-trapping decoding cyclic burst error correcting codes

Decoding of cyclic burst error correcting codes, such as Meggitt, error-trapping decoding, have generally been implemented using linear feedback shift registers(LFSR). However, such sequential decoding schemes are not suitable for modern high-speed channels that demand high-speed parallel decoding. Data storage and propagation delay are the main limitation. This paper proposes a parallel error-trapping decoding method for cyclic burst error correcting codes. In this method, a binary matrix T defines the entire decoding process. The decoding method can be implemented using mainly combination logic which could decrease the decoding delay.