• DocumentCode
    3388755
  • Title

    Counting bottlenecks to show monotone P≠NP

  • Author

    Haken, Armin

  • Author_Institution
    1805 Augusta Drive, Champaign, IL, USA
  • fYear
    1995
  • fDate
    23-25 Oct 1995
  • Firstpage
    36
  • Lastpage
    40
  • Abstract
    The method of proving lower bounds by bottleneck counting is illustrated for monotone Boolean circuits. This paper gives another proof of the result of Razborov (1985) and Andreev (1985), that monotone Boolean circuits must have exponential size when solving a problem in NP. More specifically, the paper defines a graph recognition problem called BMS. Any monotone circuit that solves BMS, must contain a quantity of gates that is exponential in the eighth root of the input size. The actual instances of the BMS problem used to prove the lower bound are easy to separate for non-monotone circuits. The proof is self-contained and uses only elementary combinatorics
  • Keywords
    Boolean functions; Circuit simulation; Combinatorial mathematics; Lattices; Turing machines;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Foundations of Computer Science, 1995. Proceedings., 36th Annual Symposium on
  • Conference_Location
    Milwaukee, WI
  • ISSN
    0272-5428
  • Print_ISBN
    0-8186-7183-1
  • Type

    conf

  • DOI
    10.1109/SFCS.1995.492460
  • Filename
    492460