SoC implementation of a novel General Flow Measurement Chip

In this paper, a novel General Flow Measurement Chip is implemented in Globalfoundries´ 0.35um technology with the galaxy flow of Synopsys softwares. This novel chip consists of DW8051 IP core, I²C controller, MBIST controller, 256 Bytes SRAM, 512 Bytes SRAM and six universal ports. The external E²PROM is utilized for the chip to boot from and the external SRAM is utilized for the test platform. This SoC implementation procedure can be divided into three stages, which are front-end, back-end and verification respectively. Timing analysis is paid the most attention through this implementation. The layout and GDS II data are finished with timing convergence and no DRC, LVS violations. Finally, the test platform of this chip is given, using the Monitor-51 in Keil software to debug the objective programs step by step.