DocumentCode
3391433
Title
Linearity testing of ADCs using low linearity stimulus and Kalman filtering
Author
Vasan, Bharath K. ; Geiger, Randall L. ; Chen, Degang J.
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
3032
Lastpage
3035
Abstract
Traditional linearity testing of ADCs involves using a spectrally pure or a highly linear stimulus, along with a large number of samples per code to average out the effects of noise. Test equipments need to house expensive instruments to provide the highly linear stimulus. The large number of samples required for the procedure results in long test times. These two factors are prime contributors to the test cost. In this paper, algorithms which use low linearity stimuli and a Kalman Filter to reduce both the hardware resources and the test time for the test procedure have been proposed. Simulations results for a 14-bit ADC show that a 7-bit linear stimulus with one sample per code can be used to measure the INL of the ADC with a maximum estimation error of 1 LSB.
Keywords
Kalman filters; analogue-digital conversion; ADC; INL; Kalman filtering; linearity testing; low linearity stimulus; word length 14 bit; word length 7 bit; Analog-digital conversion; Automatic testing; Circuit testing; Costs; Filtering; Hardware; Kalman filters; Linearity; State estimation; Test equipment; Analog to Digital Converters (ADC); Code Density Testing; DNL (Differential Non Linearity); INL (Integral Non Linearity); Kalman Filtering; Samples per code;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5538006
Filename
5538006
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