DocumentCode
3394037
Title
Pulsed READ in spin transfer torque (STT) memory bitcell for lower READ disturb
Author
Raychowdhury, Arijit
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2013
fDate
15-17 July 2013
Firstpage
34
Lastpage
35
Abstract
In this paper we propose a pulsed READ for 1T-1R STT-MRAM bitcell to reduce READ disturb during the process of READing. The basic premise of the approach is based on the fact, that the READ current perturbs the nano-magnet and creates a torque, which moves the magnetic vector from the easy-axis. Monte Carlo simulations performed under variation of both the storage node and the access device reveals that the READ failure probability is significantly reduced for two different current levels when the bitcell is READ with a pulsed word line (WL) with the same current and same effective time.
Keywords
CMOS integrated circuits; MRAM devices; Monte Carlo methods; failure analysis; nanoelectronics; nanomagnetics; 1T-1R STT-MRAM bitcell; Monte Carlo simulations; magnetic vector; nanomagnet; pulsed read; pulsed word line; read disturb; read failure probability; spin transfer torque memory bitcell; Magnetic moments; Magnetomechanical effects; Mathematical model; Random access memory; Switches; Torque; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanoscale Architectures (NANOARCH), 2013 IEEE/ACM International Symposium on
Conference_Location
Brooklyn, NY
Print_ISBN
978-1-4799-0873-8
Type
conf
DOI
10.1109/NanoArch.2013.6623037
Filename
6623037
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