DocumentCode
3398350
Title
Proceedings of the ASP-DAC 2003. Asia and South Pacific Design Automation Conference 2003 (Cat. No.03EX627)
fYear
2003
fDate
24-24 Jan. 2003
Abstract
The following topics are dealt with: bus encoding and memory optimization; DSM interconnect and gate issues; embedded software - task scheduling and compilation; combinational and sequential verification; synthesis for power performance optimization; routing; DFT optimizations; RF circuits design and methodology.
Keywords
VLSI; circuit optimisation; design for testability; electronic design automation; encoding; formal verification; integrated circuit design; integrated circuit interconnections; logic CAD; network routing; radiofrequency integrated circuits; DFT optimizations; DSM gate issues; DSM interconnect; RF circuits design; bus encoding; combinational verification; compilation; embedded software; memory optimization; power performance optimization; sequential verification; task scheduling; Asia; CD-ROMs; Circuits and Systems Society; Cities and towns; Design automation; Design engineering; Industrial electronics; Information processing; Information technology; Permission;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific
Conference_Location
Kitakyushu, Japan
Print_ISBN
0-7803-7659-5
Type
conf
DOI
10.1109/ASPDAC.2003.1194983
Filename
1194983
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