Power efficient architecture of pre-computation based content addressable memory

Content- addressable memory (CAM) is frequently used in applications, such as lookup tables, data bases, associative computing and networking that require high-speed searches in order to improve the performance. By using parallel comparison search time is reduced but power consumption is raised. In this paper we proposed Banked architecture which will reduce most of the dissipated power with negligible hardware complexity. In this PB-CAM architecture most of the work is carried out by parameter extractor and hence total work of this Banked architecture is reduced that saves energy during searching operation. Once the work operation is selected, search is done locally so that remaining banks will be disabled which saves power. In our experiment we used Xilinx to estimate the power consumption. Compared with the ones count PB-CAM system the experimental result shows that our proposed approach can achieve on average 30% of power reduction.