• DocumentCode
    3403500
  • Title

    A new static test of a DAC with a built-in structure

  • Author

    Incheol Kim ; Jaewon Jang ; HyeonUk Son ; Sungho Kang

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea
  • fYear
    2011
  • fDate
    7-10 Aug. 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A new BIST (Built-In Self-Test) scheme to test static parameters of a DAC (Digital-to-Analog Converter) is proposed in this paper. The proposed BIST employs a ramp generator and two voltage references to calculate static parameters of a DAC such as offset, gain, INL (Integral Non-Linearity) and DNL(Differential Non-Linearity). The optimization of calculating static parameters and the element sharing can reduce the BIST circuitry. The simulation results which validate our method are able to detect the linearity errors with the simple hardware architecture.
  • Keywords
    built-in self test; circuit testing; digital-analogue conversion; BIST circuitry; BIST scheme; DAC static test; built-in self-test scheme; digital-to-analog converter; element sharing; linearity errors; ramp generator; voltage references; Clocks; Europe;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
  • Conference_Location
    Seoul
  • ISSN
    1548-3746
  • Print_ISBN
    978-1-61284-856-3
  • Electronic_ISBN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2011.6026361
  • Filename
    6026361