DocumentCode
3405593
Title
Two-dimensional image processing without transpose
Author
Tu Baozhao ; Li Dong ; Han, Chengde
Author_Institution
Inst. of Comput. Technol., Chinese Acad. of Sci., Beijing, China
Volume
1
fYear
2004
fDate
31 Aug.-4 Sept. 2004
Firstpage
523
Abstract
This paper provides a new solution to the cache efficiency problem in processing large two-dimensional image at both row and column directions, by implementing a special SDRAM controller in FPGA which can access image data at both directions efficiently and by employing some accessing rules in software which can guarantee cache coherence. By contrast with traditional corner turn (transpose of matrix) method, our design consumes less hardware resources by making additional corner turn memory unnecessary, and has the processing time shortened by skipping the comer turn phase.
Keywords
DRAM chips; SRAM chips; field programmable gate arrays; image processing; multidimensional signal processing; FPGA; SDRAM controller; cache efficiency problem; corner turn method; field programmable gate array; image data; two-dimensional image processing; Application specific integrated circuits; Bandwidth; Control systems; Field programmable gate arrays; Image processing; Large Hadron Collider; Read-write memory; Registers; SDRAM; Software maintenance;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing, 2004. Proceedings. ICSP '04. 2004 7th International Conference on
Print_ISBN
0-7803-8406-7
Type
conf
DOI
10.1109/ICOSP.2004.1452697
Filename
1452697
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