DocumentCode
3407550
Title
Gm /ID based noise analysis for CMOS analog circuits
Author
Ou, Jinping
Author_Institution
Dept. of Eng. Sci., Sonoma State Univ., Rohnert Park, CA, USA
fYear
2011
fDate
7-10 Aug. 2011
Firstpage
1
Lastpage
4
Abstract
This paper proposes a technique to obtain thermal noise coefficient (γ) and corner frequency (fco) from simulation. Once determined, γ and fco can be integrated into the gm/ID design flow to simplify CMOS analog circuit design. A folded cascode operational transconductance amplifier (OTA) is designed to provide a point of comparison. A 10% error in input noise and a 25% error in output noise show that γ and fco can indeed be integrated into the gm/ID design flow.
Keywords
CMOS analogue integrated circuits; integrated circuit noise; CMOS analog circuits; corner frequency; input noise error; noise analysis; output noise; output noise error; Analog circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location
Seoul
ISSN
1548-3746
Print_ISBN
978-1-61284-856-3
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2011.6026580
Filename
6026580
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