Epi replacement and up to 30% process simplification in a CMOS foundry environment using the BILLI structure

We report for the first time a reduction of up to 30% in front end processing steps and the potential elimination of epi wafers from a typical CMOS twin well process scheme. This was achieved through process integration and optimization of the BILLI technology while maintaining all standard device parametrics. We show our process integration methodology and device parametric tuning results as a function of BILLI implant energy, dose and species in forming the twin n-well and p-well structures. Consequently, the BILLI process has commenced implementation in manufacturing, allowing us to pass on significant benefits to our customers in reducing both cost and cycle time, and be very competitive in the foundry business