DocumentCode
3411293
Title
A 4Mb 0.18 μm 1T1MTJ Toggle MRAM memory
Author
Nahas, J. ; Andre, T. ; Subramanian, C ; Garni, B. ; Lin, H. ; Omair, A. ; Martino, W.
Author_Institution
Motorola, Austin, TX, USA
fYear
2004
fDate
19-19 Feb. 2004
Firstpage
44
Abstract
The 4.5×6.3mm2 25ns cycle-time 4Mb Toggle MRAM memory, built in 0.18 μm 5M CMOS technology, uses a 1.55 μm2 bit cell with a single toggling magneto tunnel junction. The memory uses uni-directional programming currents with isolated write and read paths and balanced current mirror sense amplifier.
Keywords
CMOS memory circuits; current mirrors; magnetoresistive devices; random-access storage; tunnelling magnetoresistance; 4 Mbit; CMOS technology; balanced current mirror sense amplifier; isolated write-read paths; magnetoresistive random access memory; nonvolatile memory; precharge transistor; single toggling magneto tunnel junction; toggle MRAM memory; unidirectional programming currents; CMOS technology; Driver circuits; EPROM; Magnetic tunneling; Magnetoresistance; Manufacturing; Nonvolatile memory; Pulse amplifiers; Random access memory; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
0-7803-8267-6
Type
conf
DOI
10.1109/ISSCC.2004.1332585
Filename
1332585
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