Counter Embedded Memory architecture for trusted computing platform

Due to various hacker attacks, trusted computing platform has received a lot of attentions recently. Encryption is introduced to maintain the confidentiality of data stored on such platform, while Message Authentication Codes (MACs) and authentication trees are employed to verify the data memory integrity. These encryption and authentication architectures suffer from several potential vulnerabilities which have been omitted by the previous work. In this paper, we first address our concern about a type of cryptanalysis; a ciphertext stored on memory can be decrypted and attacked by an adversary and the MACs and the authentication trees would become the victim of cryptanalytic attacks. In addition, we show that such an attack can be extended to multi-core systems by simply corrupting other unprotected cores and performing malicious behaviors. To handle these scenarios, we propose a Counter Embedded Memory (CEM) design, and employ embedded counters to record every data fetch and trace malicious operations. The proposed platform with CEM allows the system to trace unexpected memory access, thus can indicate potential attack in progress. We present both qualitative discussion and quantitative analysis to show the effectiveness of the proposed architecture. Our FPGA rapid prototype shows that the additional memory overhead is only 0.10% and the latency can be totally neglected.