DocumentCode
3414835
Title
A 63 GHz VCO using a standard 0.25 μm CMOS process
Author
Ren-Chieh Liu ; Hong-Yeh Chang ; Chi-Hsueh Wang ; Huei Wang
Author_Institution
Nat. Taiwan Univ., Taipei, Taiwan
fYear
2004
fDate
15-19 Feb. 2004
Firstpage
446
Abstract
A 63 GHz VCO using a 0.25 μm 1P6M CMOS is presented. It achieves an output power of -4 dBm without any output amplifier. This VCO is tunable over a 2.5 GHz range and its phase noise is -85 dBc/Hz at 1 MHz offset. The IC covers an area of 0.315 mm2 and consumes 118 mW maximum.
Keywords
CMOS integrated circuits; MMIC oscillators; circuit optimisation; circuit tuning; integrated circuit design; integrated circuit measurement; integrated circuit noise; millimetre wave oscillators; phase noise; voltage-controlled oscillators; 0.25 micron; 118 mW; 2.5 GHz; 63 GHz; IC area; VCO; output amplifier; output power; phase noise; power consumption; standard CMOS process; tunable VCO; CMOS process; Coplanar waveguides; Dielectric substrates; Frequency; Inductors; Phase noise; Power amplifiers; Power generation; Semiconductor device modeling; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
ISSN
0193-6530
Print_ISBN
0-7803-8267-6
Type
conf
DOI
10.1109/ISSCC.2004.1332786
Filename
1332786
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