A new bus assignment in a designed shared bus switch fabric

Author

Torres, D. ; Gonzalez, J. ; Guzman, M. ; Nunez, L.

Author_Institution

Nat. Polytech. Inst., CINVESTAV-IPN, Mexico City, Mexico

Volume

1

fYear

1999

fDate

36342

Firstpage

423

Abstract

This work presents an architecture for a cell switch fabric, which has a modular structure with a chip partitioning oriented to avoid the system falling down totally, achieving expandability and increasing reuse. Different algorithms for the bus assignment are discussed in this paper, and the common bus is assigned in a cyclic and rotative way and cells segmented in microcells. The cell switch fabric is built on PCBs where every one has a capacity; for four ports at 164.323 Mbps, the external port rate is 155.52 Mbps. A microcontroller, in the card, can communicate with a PC, which runs a test, verification and CSF configuration program. It can switch the bus operation frequency and measures some parameters of the CSF behavior. Each port was implemented on a CPLD FLEX10K100 and the Switch Control Block on a circuit MAX7128, both from Altera Company

Keywords

B-ISDN; asynchronous transfer mode; packet switching; programmable logic devices; 155.52 Mbit/s; 164.323 Mbit/s; Altera FLEX10K100; Altera MAX7128; bus assignment; bus operation frequency; cell switch fabric; chip partitioning; expandability; external port rate; microcells; microcontroller; modular structure; reuse; shared bus switch fabric; Asynchronous transfer mode; Circuit testing; Fabrics; Flexible printed circuits; Frequency measurement; Microcell networks; Microcontrollers; Postal services; Switches; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on

Conference_Location

Orlando, FL

Print_ISBN

0-7803-5471-0

Type

conf

DOI

10.1109/ISCAS.1999.777899

Filename

777899