Fully digital adaptive DC-DC converter based on improved PSM in 90 nm CMOS

A fully digital adaptive DC-DC converter based on improved pulse skip modulation (PSM) in 90 nm CMOS is proposed in this paper. The controller of the converter includes a delayline, a slacktime detector, a finite-state machine and a variable pulse-width generator. The structure of the controller of the proposed adaptive DC-DC converter is very simple and can be realized by digital design methodology and process. The converter is designed in 90 nm CMOS process, operating typically at 1.5 MHz. The post-simulation results show that the output voltage of the converter is adjusted ranged from 0.7 V to 1.5 V to the varied frequency ranged from 62.5 MHz to 250 MHz of the digital load circuit.