DocumentCode
3417180
Title
Enhancing performance of network-on-chip architectures with millimeter-wave wireless interconnects
Author
Deb, Sujay ; Ganguly, Amlan ; Chang, Kevin ; Pande, Partha ; Beizer, B. ; Heo, Deuk
Author_Institution
Sch. of Electr. Eng. & Comput. Sci., Washington State Univ., Washington, DC, USA
fYear
2010
fDate
7-9 July 2010
Firstpage
73
Lastpage
80
Abstract
In a traditional Network-on-Chip (NoC), latency and power dissipation increase with system size due to its inherent multi-hop communications. The performance of NoC communication fabrics can be significantly enhanced by introducing long-range, low power, high bandwidth direct links between far apart cores. In this paper a design methodology for a scalable hierarchical NoC with on-chip millimeter (mm)-wave wireless links is proposed. The proposed wireless NoC offers significantly higher throughput and lower energy dissipation compared to its conventional multi-hop wired counterpart. It is also demonstrated that the proposed hierarchical NoC with long range wireless links shows significant performance gains in presence of various application-specific traffic and multicast scenarios.
Keywords
Bandwidth; Delay; Design methodology; Fabrics; Millimeter wave communication; Millimeter wave technology; Network-on-a-chip; Power dissipation; Power system interconnection; Spread spectrum communication;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-specific Systems Architectures and Processors (ASAP), 2010 21st IEEE International Conference on
Conference_Location
Rennes, France
ISSN
2160-0511
Print_ISBN
978-1-4244-6966-6
Electronic_ISBN
2160-0511
Type
conf
DOI
10.1109/ASAP.2010.5540799
Filename
5540799
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