• DocumentCode
    3417664
  • Title

    30V sub-micron shallow junction planar-MOSFET for DC-DC converters

  • Author

    Ono, Syotaro ; Yamaguchi, Yoshihiro ; Kawaguchi, Yusuke ; Nakagawa, Akio

  • Author_Institution
    Discrete Semicond. Div., Toshiba Corp. Semicond. Co., Kawasaki, Japan
  • fYear
    2004
  • fDate
    24-27 May 2004
  • Firstpage
    401
  • Lastpage
    404
  • Abstract
    We present sub-micron shallow p-base planar-DMOSFETs (DMOS: double diffused MOSFET type) for DC-DC converter applications. The shallow junction depth is quite useful to reduce the device on-resistance. It was found that the gate-drain feedback charge can effectively be reduced by adopting a very narrow and shallow JFET region with very high JFET donor concentration, based on the charge compensation theory. An experimental planar DMOSFET with p-base depth of 0.8 μm exhibited a breakdown voltage of 34 V, an Ron*Qgd of 14.9 mΩnC, and good UIS capability. This is the best value ever reported for a 30 V planar DMOSFET structure.
  • Keywords
    DC-DC power convertors; charge compensation; power MOSFET; semiconductor device breakdown; 0.8 micron; 30 V; 34 V; DC-DC converters; DMOS; UIS capability; breakdown voltage; charge compensation theory; double diffused MOSFET; gate-drain feedback charge reduction; high JFET donor concentration; junction depth; narrow JFET region; on-resistance reduction; p-base planar-DMOSFET; shallow JFET region; shallow junction MOSFET; DC-DC power conversion; Power MOSFETs;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Semiconductor Devices and ICs, 2004. Proceedings. ISPSD '04. The 16th International Symposium on
  • Print_ISBN
    4-88686-060-5
  • Type

    conf

  • DOI
    10.1109/ISPSD.2004.1332958
  • Filename
    1332958