DocumentCode
3419098
Title
Evaluation of SIMD architecture enhancement in embedded processors for MPEG-4
Author
Iranpour, Ali R. ; Kuchcinski, Krzysztof
Author_Institution
Dept. of Comput. Sci., Lund Univ., Sweden
fYear
2004
fDate
31 Aug.-3 Sept. 2004
Firstpage
262
Lastpage
269
Abstract
This paper presents our studies on the effects of using SIMD processor extension developed to enhance the processor performance for streaming applications. Our approach was evaluated using MPEG-4 encoding application as benchmark. Although MPEG-4 consists of many different operations, we concentrated on the sum of absolute differences (SAD), a major part of the motion estimation. The SAD was chosen because it is one of the most frequently used operations in MPEG-4 encoding. It is estimated to consume between 40%-80% of the total video encoding time when implemented on a general purpose processor. We have performed an extensive evaluation of our architecture extension. This evaluation showed that it is possible to achieve high performance with acceptable power consumption. We obtained about two times performance improvement for MPEG-4 encoding with roughly the same power consumption.
Keywords
embedded systems; logic design; microprocessor chips; motion estimation; parallel architectures; video coding; MPEG-4 encoding; SIMD architecture; embedded processors; motion estimation; power consumption; streaming applications; sum of absolute differences; video encoding; Digital systems; MPEG 4 Standard;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design, 2004. DSD 2004. Euromicro Symposium on
Print_ISBN
0-7695-2203-3
Type
conf
DOI
10.1109/DSD.2004.1333286
Filename
1333286
Link To Document