DocumentCode
3419435
Title
Performance evaluation of a multiprocessor system with dual-port directory caches
Author
Luo, Xiao
Author_Institution
Dept. of Comput. Sci., Victoria Univ., BC, Canada
fYear
1991
fDate
9-10 May 1991
Firstpage
215
Abstract
A cache is presented with a single dual-port directory which can be used for both the processor accesses and coherence operations simultaneously. The complexity of such a dual-port directory cache is far less than that of a traditional two-directory cache. A bus-based shared-memory multiprocessor model with dedicated private caches is described. Summarized results from extensive simulations are presented, and the performance of the multiprocessor system with the dual-port directory caches is evaluated
Keywords
buffer storage; multiprocessing systems; performance evaluation; bus-based shared-memory multiprocessor model; dual-port directory caches; multiprocessor system; performance evaluation; Cache memory; Coherence; Degradation; Interference; Multiprocessing systems; Protocols; Registers; System performance; Telecommunication traffic; Traffic control;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Computers and Signal Processing, 1991., IEEE Pacific Rim Conference on
Conference_Location
Victoria, BC
Print_ISBN
0-87942-638-1
Type
conf
DOI
10.1109/PACRIM.1991.160718
Filename
160718
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