DocumentCode
3419550
Title
Pulsed VLSI for RBF neural networks
Author
Mayes, D.J. ; Murray, A.F. ; Reekie, H.M.
Author_Institution
Dept. of Electr. Eng., Edinburgh Univ., UK
fYear
1996
fDate
12-14 Feb 1996
Firstpage
177
Lastpage
184
Abstract
This paper presents simulation and hardware results from cascadable circuits for pulsed Radial Basis Function (RBF) neural network chips. The functionality of each circuit is clearly demonstrated from the hardware results and consideration is also given to the practical issues affecting the development of a pulsed RBF demonstrator chip
Keywords
VLSI; cascade networks; neural chips; pulse width modulation; PWM circuit; RBF neural networks; cascadable circuits; neural network chips; pulsed VLSI; radial basis function; Application software; Artificial neural networks; Circuit simulation; Computer architecture; Neural network hardware; Neural networks; Pulse circuits; Pulse width modulation; Space vector pulse width modulation; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics for Neural Networks, 1996., Proceedings of Fifth International Conference on
Conference_Location
Lausanne
ISSN
1086-1947
Print_ISBN
0-8186-7373-7
Type
conf
DOI
10.1109/MNNFS.1996.493789
Filename
493789
Link To Document