• DocumentCode
    3422096
  • Title

    Delay-line based temperature sensors for on-chip thermal management

  • Author

    Shuang Xie ; Wai Tung Ng

  • Author_Institution
    Edward S. Rogers Sr. Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, Canada
  • fYear
    2012
  • fDate
    Oct. 29 2012-Nov. 1 2012
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Integrated digital temperature sensors facilitate advanced thermal and power management. This paper reviews the integrated delay-line based temperature sensors, in terms of operating principle, the state-of-the-art power and area optimization and calibration methods. A self-calibration approach recently introduced will also be discussed in detail. This self-calibration method allows the automatic elimination of process variations and mismatches without the need for individual preprocess trimming as needed in traditional approaches. Measurement results for a 65nm CMOS delay-line based temperature sensor confirms an energy per conversion of 0.02 nJ with a resolution of 0.5 °C between 20 to 80 °C with a maximum error of ±2.0 oC. The active area of the temperature sensor is only 0.002 mm2.
  • Keywords
    CMOS integrated circuits; calibration; delay lines; optimisation; temperature sensors; thermal management (packaging); CMOS delay-line based temperature sensor; automatic elimination; integrated delay-line; integrated digital temperature sensors; on-chip thermal management; optimization; power management; preprocess trimming; self-calibration; size 65 nm; Calibration; Delay; Delay lines; Radiation detectors; Ring oscillators; Temperature measurement; Temperature sensors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
  • Conference_Location
    Xi´an
  • Print_ISBN
    978-1-4673-2474-8
  • Type

    conf

  • DOI
    10.1109/ICSICT.2012.6467932
  • Filename
    6467932