DocumentCode
3422722
Title
Nitride cladded poly-Si spacer LOCOS (NCPSL) isolation technology for the 1 giga bit DRAM
Author
Kim, S.E. ; Kim, Y.D. ; Ahn, D.H. ; Hong, S.J. ; Shin, Y.G. ; Park, Y.W. ; Kang, H.K. ; Koh, Y.B. ; Lee, M.Y.
Author_Institution
Semicond. R&D Center, Samsung Electron. Co. Ltd., Kyungki, South Korea
fYear
1996
fDate
8-11 Dec. 1996
Firstpage
825
Lastpage
828
Abstract
A novel LOCOS type isolation technology, Nitride Cladded Poly-Si Spacer LOGOS (NCPSL) which is for the 1 giga bit DRAM, has been developed. The features of the NCPSL process are low bird´s beak encroachment and long effective isolation length, which are achieved by using substrate silicon recess etching, poly-Si sidewall spacer, and selectively deposited SiN to the poly-Si spacer. NCPSL isolation shows the excellent active definition, high punchthrough voltage, low junction leakage current, hump free transistor characteristic, and good gate oxide integrity. Considering its isolation characteristics, NCPSL is the very practical technology for the isolation of 1 giga bit DRAM.
Keywords
DRAM chips; isolation technology; 1 Gbit; DRAM; NCPSL isolation technology; active definition; bird´s beak; gate oxide integrity; hump free transistor characteristic; junction leakage current; nitride cladded poly-Si spacer LOCOS; poly-Si sidewall spacer; punchthrough voltage; selectively deposited SiN; substrate silicon recess etching; Etching; Isolation technology; Leakage current; Low voltage; Oxidation; Random access memory; Research and development; Silicon compounds; Space technology; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1996. IEDM '96., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Print_ISBN
0-7803-3393-4
Type
conf
DOI
10.1109/IEDM.1996.554106
Filename
554106
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