• DocumentCode
    3423942
  • Title

    Parameterisable floating-point operations on FPGA

  • Author

    Lee, Barry ; Burgess, Neil

  • Author_Institution
    Sch. of Eng., Cardiff Univ., UK
  • Volume
    2
  • fYear
    2002
  • fDate
    3-6 Nov. 2002
  • Firstpage
    1064
  • Abstract
    The paper presents a group of IEEE 754-style floating-point units targeted at Xilinx VirtexII FPGA. Special features of the technology are taken advantage of to produce optimised components. Pipelined designs are given that show the latency of /spl sim/100 MHz single-precision components. Non-pipelined reference designs are included for future comparison purposes.
  • Keywords
    field programmable gate arrays; floating point arithmetic; logic design; pipeline arithmetic; IEEE 754; Xilinx VirtexII FPGA; floating-point operations; nonpipelined reference designs; pipelined designs; Clocks; Delay; Field programmable gate arrays; Floating-point arithmetic; H infinity control; Hardware; Logic; Pipelines; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals, Systems and Computers, 2002. Conference Record of the Thirty-Sixth Asilomar Conference on
  • Conference_Location
    Pacific Grove, CA, USA
  • ISSN
    1058-6393
  • Print_ISBN
    0-7803-7576-9
  • Type

    conf

  • DOI
    10.1109/ACSSC.2002.1196947
  • Filename
    1196947
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3423942