DocumentCode
3430622
Title
Systematic derivation of VLSI arrays for digital DSP algorithms
Author
Kiaei, Sayfe
Author_Institution
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
fYear
1991
fDate
9-10 May 1991
Firstpage
623
Abstract
The authors present an overview of synthesis methods for VLSI array processors. The synthesis was based on expressing the algorithm in terms of a set of recurrence equations which were mapped onto a set of processing elements connected in a systolic fashion. A method for the synthesis of multirate arrays is outlined. to show the synthesis procedure, the systematic derivation of the array structure for infinite impulse response (IIR) digital filters is presented. The authors illustrate how these transformations can be applied
Keywords
VLSI; digital filters; digital signal processing chips; network synthesis; systolic arrays; DSP algorithms; IIR filters; VLSI array processors; array structure; digital filters; infinite impulse response; multirate array synthesis; processing elements; recurrence equations; systolic structure; Clocks; Delay; Difference equations; Digital signal processing; Image processing; Iterative algorithms; Signal processing algorithms; Signal synthesis; Systolic arrays; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Computers and Signal Processing, 1991., IEEE Pacific Rim Conference on
Conference_Location
Victoria, BC
Print_ISBN
0-87942-638-1
Type
conf
DOI
10.1109/PACRIM.1991.160816
Filename
160816
Link To Document