DocumentCode
3433858
Title
Modified Stability Checking for On-line Error Detection
Author
Yada, Satish ; Amrutur, Bharadwaj ; Parekhji, Rubin A.
Author_Institution
Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore
fYear
2007
fDate
Jan. 2007
Firstpage
787
Lastpage
792
Abstract
The paper propose a unified error detection technique, based on stability checking, for on-line detection of delay, crosstalk and transient faults in combinational circuits and SEUs in sequential elements. The proposed method, called modified stability checking (MSC), overcomes the limitations of the earlier stability checking methods. The paper also proposed a novel checker circuit to realize this scheme. The checker is self-checking for a wide set of realistic internal faults including transient faults. Extensive circuit simulations have been done to characterize the checker circuit. A prototype checker circuit for a 1mm2 standard cell array has been implemented in a 0.13mum process
Keywords
automatic test equipment; combinational circuits; crosstalk; delays; fault diagnosis; logic testing; sequential circuits; transients; 0.13 micron; SEU testing; checker circuit; combinational circuits; concurrent testing; crosstalk detection; delay detection; internal faults; modified stability checking; online error detection; self-checking circuit; sequential elements; transient faults; unified error detection; Circuit faults; Circuit simulation; Circuit stability; Combinational circuits; Crosstalk; Delay; Electrical fault detection; Fault detection; Prototypes; Single event transient; Concurrent testing; SEU testing; and transient faults; crosstalk faults; delay faults; modified stability checking; on-line error detection.; self-checking circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2007. Held jointly with 6th International Conference on Embedded Systems., 20th International Conference on
Conference_Location
Bangalore
ISSN
1063-9667
Print_ISBN
0-7695-2762-0
Type
conf
DOI
10.1109/VLSID.2007.113
Filename
4092137
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