P-JFET on SIMOX for rad-hard analog devices

Author

Blanc, J.P. ; Bonaime, J. ; Delevoye, E. ; Gautier, J. ; de Pontcharra, J. ; Truche, R. ; Dupont-Nivet, E. ; Martin, J.-L. ; Montaron, J.

Author_Institution

CEA/DTA/LETI/Grenoble, France

fYear

1990

fDate

2-4 Oct 1990

Firstpage

85

Lastpage

86

Abstract

Development of a fully CMOS and bipolar compatible JFET process on SIMOX is reported. The main characteristics obtained on a two-junction-type JFET realized in 1-μm silicon epitaxy on SOI material are presented. A mesa-structure has been chosen for lateral isolation. A deep junction is arsenic implanted before epitaxy at 1000°C; the channel and drain/source doping levels are controlled by ion implantation; the upper junction is diffused from polysilicon. Radiation dose, neutron fluence, and photocurrent effects are described

Keywords

integrated circuit technology; ion implantation; junction gate field effect transistors; radiation hardening (electronics); semiconductor-insulator boundaries; solid phase epitaxial growth; CMOS compatible; JFET process on SIMOX; SOI material; Si-SiO₂; Si:As; bipolar compatible; ion implantation; lateral isolation; mesa-structure; neutron fluence; photocurrent effects; rad-hard analog devices; radiation dose effects; two-junction-type JFET; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS process; CMOS technology; Epitaxial growth; Integrated circuit technology; JFET integrated circuits; Neutrons; Photoconductivity; Radiation hardening;

fLanguage

English

Publisher

ieee

Conference_Titel

SOS/SOI Technology Conference, 1990., 1990 IEEE

Conference_Location

Key West, FL

Print_ISBN

0-87942-573-3

Type

conf

DOI

10.1109/SOSSOI.1990.145721

Filename

145721