Functional Verification of Future Higher Class UHF RFID Tag Architectures based on Cosimulation

Todays applications for UHF RFID tags require a high operating distance and communication performance, sensing and monitoring capabilities, autonomous data processing, alarm handling and large memory areas and drive them to become embedded systems of increased complexity and energy consumption. This work proposes a novel tag architecture satisfying today´s and future requirements on higher class UHF RFID systems with mentioned functionality and incorporating energy harvesting devices as additional power supply. A novel simulation concept for the functional verification of the architecture is presented, which is based on a cosimulation approach. It combines system level models of the UHF RFID system with hardware level descriptions of components defining the energy consumption of the tag. To prove the proposed simulation concept, a part of the entire system model is presented at the end of the paper together with related simulation results showing the benefits of the implementation.