Microelectronics BEOL reliability basics and evolution

Summary form only given. The set of traditional back-end-of-line (BEOL) reliability concerns includes electromigration (EM), mechanical stability, stress-induced voiding (SV) and corrosion for aluminum (Al) metallizations. With the introduction of dual-damascene Cu and low-k BEOL dielectric materials, combined with continued reduction in dimensions required for increased circuit density, time-dependent dielectric breakdown (TDDB) of both inter- and intra-level dielectric has become an additional concern. All of the standard testing is still carried on for each of these failure mechanisms, but trends to include large features, such as inductors for RF parts and through-Si vias (TSV´s) for chip stacking, in combination with progressively smaller minimum line widths and pitches have lead to a divergence in both testing requirements and test structures to ensure chip reliability. In addition, emerging applications using high voltages, thick wiring levels and thick dielectric layers are requiring much greater test voltages and currents in order to produce failure distributions adequate for lifetime projections. These challenges promise to provide continued entertainment for BEOL Reliability engineers for the next few years.