• DocumentCode
    3436448
  • Title

    An embedded autonomous scan-based results analyzer (EARA) for SoC cores

  • Author

    Nahvi, Mohsen ; Ivanov, André

  • Author_Institution
    Dept. of Electr. & Comput. Eng., British Columbia Univ., Canada
  • fYear
    2003
  • fDate
    27 April-1 May 2003
  • Firstpage
    293
  • Lastpage
    298
  • Abstract
    Relying solely upon external ATE resources for scan test in complex SoC designs is increasingly difficult. In this work, we develop the concept and implementation of an embedded autonomous results analyzer (EARA) to be used in our modified dedicated autonomous scan-based testing (DAST) methodology. DAST introduces hierarchy and separates the functionality of ATE resources into two distinctive classes: a) test data communication; and b) test data control and observation. Consequently, test data control/observation functions are transferred to embedded blocks. In this work, we extend DAST to include the sending of expected test results along with the test stimulus to enable on-chip comparison. We present implementation results of EARA when applied to a number of SoC benchmarks.
  • Keywords
    automatic test equipment; boundary scan testing; circuit simulation; integrated circuit design; integrated circuit testing; logic design; logic simulation; logic testing; system-on-chip; ATE resources; DAST hierarchy; EARA; SoC cores; dedicated autonomous scan-based testing; embedded autonomous results analyzer; embedded blocks; on-chip test stimulus/results comparison; test data communication; test data control; test data observation; Testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium, 2003. Proceedings. 21st
  • ISSN
    1093-0167
  • Print_ISBN
    0-7695-1924-5
  • Type

    conf

  • DOI
    10.1109/VTEST.2003.1197666
  • Filename
    1197666