DocumentCode
3436496
Title
Effect of interlayer insulation on CdSe junction capacitance under reverse bias
Author
Ingole, V.T. ; Ghatol, A.A.
Author_Institution
Pune Inst. of Comput. Technol., India
fYear
2000
fDate
2000
Firstpage
109
Lastpage
114
Abstract
CdSe devices were fabricated in batches by laying interlayer insulation of different thickness between cadmium and selenium layers. The manifestations of such insulation thickness on device capacitance and shunt resistance under reverse bias condition are investigated. It is reported that insulation does not affect the impurity profile. Device simulation with experimental verification is presented
Keywords
II-VI semiconductors; cadmium compounds; capacitance; semiconductor device models; semiconductor diodes; solid-state rectifiers; CdSe; CdSe devices; CdSe junction capacitance; device simulation; diode; experimental verification; impurity profile; insulation thickness; interlayer insulation; rectifier; reverse bias; shunt resistance; Cadmium; Capacitance; Diodes; Electric resistance; Electric variables measurement; Electrical resistance measurement; Fabrication; Impurities; Insulation; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Compound Semiconductors, 2000 IEEE International Symposium on
Conference_Location
Monterey, CA
Print_ISBN
0-7803-6258-6
Type
conf
DOI
10.1109/ISCS.2000.947138
Filename
947138
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