Investigation of ESD devices in 0.18 μm SiGe BiCMOS process

Author

Chen, Shiao-Shien ; Chen, Tung-Yang ; Tang, Tien-Hao ; Hsu, Tsun-Lai ; Tseng, Hua-Chou ; Chen, Jen-Kon ; Chou, Chiu-Hsiang

Author_Institution

Device Eng. Dept., United Microelectron. Corp., Hsin-Chu, Taiwan

fYear

2003

fDate

30 March-4 April 2003

Firstpage

357

Lastpage

360

Abstract

This paper investigates the characteristics of ESD devices in a 0.18 μm silicon-germanium (SiGe) BiCMOS process including SiGe heterojunction bipolar transistors (HBTs), gate-grounded N/PMOS transistors, p-n junction diodes in SiGe HBTs, p⁺/n-well diodes, and BiCMOS deep-trench (DT) diodes. According to our results, an open base configuration in the SiGe HBT has a lower trigger voltage and higher ESD efficiency than the gate-grounded N/PMOS. In addition, we propose a novel BiCMOS low-leakage DT diode string with controllable blocking voltage for RF-ESD protection designs.

Keywords

BiCMOS integrated circuits; Ge-Si alloys; electrostatic discharge; heterojunction bipolar transistors; integrated circuit reliability; leakage currents; protection; radiofrequency integrated circuits; semiconductor device reliability; semiconductor materials; 0.18 μm SiGe BiCMOS process; 0.18 micron; BiCMOS deep-trench diodes; ESD devices; ESD efficiency; HBTs; RF-ESD protection designs; SiGe; SiGe heterojunction bipolar transistor; controllable blocking voltage; gate-grounded N/PMOS transistors; open base configuration; p-n junction diodes; p⁺/n-well diodes; radio-frequency IC design; trigger voltage; BiCMOS integrated circuits; Diodes; Electrostatic discharge; Germanium silicon alloys; Heterojunction bipolar transistors; MOSFETs; P-n junctions; Protection; Silicon germanium; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium Proceedings, 2003. 41st Annual. 2003 IEEE International

Print_ISBN

0-7803-7649-8

Type

conf

DOI

10.1109/RELPHY.2003.1197773

Filename

1197773