Stress-induced voiding under vias connected to "narrow" copper lines

Author

Kouno, T. ; Suzuki, T. ; Otsuka, S. ; Hosoda, T. ; Nakamura, T. ; Mizushima, Y. ; Shiozu, M. ; Matsuyama, H. ; Shono, K. ; Watatani, H. ; Ohkura, Y. ; Sato, M. ; Fukuyama, S. ; Miyajima, M.

Author_Institution

Fujitsu Ltd., Tokyo

fYear

2005

fDate

5-5 Dec. 2005

Firstpage

187

Lastpage

190

Abstract

Stress-induced voiding under vias connected to "narrow" Copper (Cu) lines (SIV-N) was observed, for the first time, using newly prepared test structures which consisted of isolated vias between narrow (0.14 mum-wide) and very long (200 mum-long) 2-level Cu wires. Mechanism of SIV-N is different from that of well-known stress-induced voiding under vias connected to "wide" Cu lines (SIV-W), because SIV-N cannot occur during actual time according to the model that explains SIV-W. In addition, we found the effect of plasma pretreatment of cap dielectrics and cap dielectrics themselves on SIV-N and the other reliability issues, and succeeded in obtaining the condition which satisfied SIV-N, SIV-W and EM

Keywords

copper; dielectric materials; wires (electric); 0.14 micron; 200 micron; Cu; SIV-N; cap dielectrics; copper lines; plasma pretreatment; stress induced voiding; test structures; vias connected; Atherosclerosis; Copper; Dielectrics; Electromigration; Hydrogen; Laboratories; Performance evaluation; Plasma temperature; Testing; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International

Conference_Location

Washington, DC

Print_ISBN

0-7803-9268-X

Type

conf

DOI

10.1109/IEDM.2005.1609302

Filename

1609302