• DocumentCode
    3441884
  • Title

    A multilayer feedforward neural network model for digital hardware implementation

  • Author

    Kwan, H.K. ; Tang, C.Z.

  • Author_Institution
    Dept. of Electr. Eng., Windsor Univ., Ont., Canada
  • Volume
    6
  • fYear
    1994
  • fDate
    30 May-2 Jun 1994
  • Firstpage
    343
  • Abstract
    A design algorithm for two-layer feedforward neural networks (2FNNs) for discrete input-output mapping is proposed. In this algorithm, uniformly quantized discrete weights are used, which could be in the form of either one-powers-of-two (OPOT) values or sum-of-powers-of-two (SPOT) values. The simplified sigmoid activation functions (SSAFs) are used at hidden neurons and the step functions are used at output neurons to further reduce the hardware implementation cost. Simulation results indicate that such networks can retain nearly identical recall performances as those of the corresponding networks using continuous weights and sigmoid activation functions (SAFs), while having increased computational speed in applications and reduced cost in digital hardware implementation
  • Keywords
    feedforward neural nets; neural chips; computational speed; cost; design algorithm; digital hardware; discrete input-output mapping; multilayer feedforward neural network model; one-powers-of-two; quantized discrete weights; simplified sigmoid activation functions; simulation; step functions; sum-of-powers-of-two; two-layer feedforward neural networks; Algorithm design and analysis; Computational modeling; Computer applications; Computer networks; Cost function; Feedforward neural networks; Multi-layer neural network; Neural network hardware; Neural networks; Neurons;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
  • Conference_Location
    London
  • Print_ISBN
    0-7803-1915-X
  • Type

    conf

  • DOI
    10.1109/ISCAS.1994.409596
  • Filename
    409596