DocumentCode
3445066
Title
System synthesis of synchronous multimedia applications
Author
Qu, Gang ; Mesarina, Malena ; Potkonjak, Miodrag
Author_Institution
Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
fYear
1999
fDate
36465
Firstpage
128
Lastpage
133
Abstract
Modern system design is being increasingly driven by applications such as multimedia and wireless sensing and communications, which all have intrinsic quality of service (QoS) requirements, such as throughput, error-rate, and resolution. One of the most crucial QoS guarantees that the system has to provide is the timing constraints among the interacting media (synchronization) and within each media (latency). We have developed the first framework for systems design with timing QoS guarantees, latency and synchronization. In particular we address how to design system-on-chip with minimal silicon area to meet timing constraints. We propose the two-phase design methodology. In the first phase, we select an architecture which facilitates the needs of synchronous low latency applications well. In the second phase, for a given processor configuration, we use our new scheduler in such a way that storage requirements are minimized. We have developed scheduling algorithms that solve the problem optimally for a-priori specified applications. The algorithms have been implemented and their effectiveness demonstrated on a set of simulated MPEG streams from popular movies
Keywords
hardware-software codesign; microprocessor chips; multimedia systems; quality of service; scheduling; synchronisation; timing; QoS guarantees; a-priori specified applications; interacting media; minimal silicon area; modern system design; processor configuration; quality of service; scheduler; scheduling algorithms; simulated MPEG streams; storage requirements; synchronization; synchronous low latency applications; synchronous multimedia applications; system synthesis; system-on-chip; systems design; timing QoS guarantees; timing constraints; two-phase design methodology; wireless sensing; Delay; Design methodology; Multimedia systems; Quality of service; Silicon; System-on-a-chip; Throughput; Timing; Wireless communication; Wireless sensor networks;
fLanguage
English
Publisher
ieee
Conference_Titel
System Synthesis, 1999. Proceedings. 12th International Symposium on
Conference_Location
San Jose, CA
Print_ISBN
0-7695-0356-X
Type
conf
DOI
10.1109/ISSS.1999.814271
Filename
814271
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