• DocumentCode
    3446257
  • Title

    Verification of real-time systems-issues and perspectives

  • Author

    Jayaram, N. ; Skead, P. ; Papadopoulos, N.

  • Author_Institution
    Sch. of Comput. Sci., Univ. of Westminster, London, UK
  • fYear
    1995
  • fDate
    34989
  • Firstpage
    42430
  • Lastpage
    42434
  • Abstract
    We identify the issues associated with real-time systems, refer to the process model with which we develop our arguments and provide a critique as to whether the current verification approaches do adequately address the behavioural issues in real-time software and hardware. We discuss our current research in real-time domain models and reference architectures as well as our initial impressions on the Stanford University´s RAPIDE language and its toolset
  • Keywords
    formal verification; real-time systems; systems analysis; Stanford University´s RAPIDE language; behavioural issues; process model; real-time domain models; real-time hardware; real-time software; real-time systems verification; reference architectures;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Verification of Hardware Software Codesign, IEE Colloquium on
  • Conference_Location
    London
  • Type

    conf

  • DOI
    10.1049/ic:19951040
  • Filename
    494689