Fully digital asynchronous symbol timing recovery in digital receiver

Author

Song, Xuehua ; Gang Wang ; Song, Xuefeng

Author_Institution

Dept. of Commun. Eng., Jiangsu Univ., Zhenjiang, China

fYear

2004

fDate

1-4 Nov. 2004

Firstpage

320

Lastpage

323

Abstract

A new asynchronous symbol timing recovery scheme, implemented by an efficient interpolation filter (Spurbeck, M. and Behrens, R.T., 1997), timing-error detector (TED) (Gardner, F.M. 1986) and a loop filter (Gardner, F.M., 1993; Fitz, M.P. and Cramer, R.J., 1995), is proposed for a 16QAM local multipoint distribution service (LMDS) down stream receiver. The scheme is verified by an FPGA-based prototype with real data and also realized in an ASIC chip using the Toshiba 0.18 μm standard cell library.

Keywords

application specific integrated circuits; digital filters; digital radio; field programmable gate arrays; integrated circuit design; interpolation; logic design; quadrature amplitude modulation; radio receivers; synchronisation; ASIC chip; FPGA; LMDS; QAM; asynchronous symbol timing recovery; digital receiver; down stream receiver; interpolation filter; local multipoint distribution service; loop filter; standard cell library; timing-error detector; Clocks; Detectors; Digital filters; Interpolation; Phase locked loops; Radio transmitters; Receivers; Sampling methods; Synchronization; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Computational Electromagnetics and Its Applications, 2004. Proceedings. ICCEA 2004. 2004 3rd International Conference on

Print_ISBN

0-7803-8562-4

Type

conf

DOI

10.1109/ICCEA.2004.1459356

Filename

1459356