• DocumentCode
    3453725
  • Title

    Integrated scheduling, allocation and binding in High Level Synthesis for performance-area tradeoff of digital media applications

  • Author

    Sengupta, Aparajita ; Sedaghat, R. ; Sarkar, Pradyut ; Sehgal, S.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Ryerson Univ., Toronto, ON, Canada
  • fYear
    2011
  • fDate
    8-11 May 2011
  • Abstract
    This paper presents a novel Genetic Algorithm based exploration approach for integrated scheduling, allocation and binding in High Level Synthesis for Digital Media applications. The contributions of the proposed approach in this paper are: (a) Exploration of performance-hardware area tradeoffs of DSP digital media applications (b) Novel multi structure topology for chromosome encoding (c) Introduction of a novel cost function based on data pipelined performance-hardware area constraints (d) Novel load factor heuristic for chromosome decoding (e) Novel seeding process of the initial population based on serial and parallel implementation logic (f) Novel merit score (M-score) technique to assess the efficiency of the proposed approach (g) Novel cost value (C-value) metric that assesses the quality of final integrated solution. The proposed approach obtained an improvement of ≈2% in quality of final solution compared to a current technique as well as achieved an efficiency of 58.33% compared to same current approach, when applied on the digital media applications.
  • Keywords
    decoding; encoding; genetic algorithms; logic circuits; DSP digital media applications; chromosome decoding; chromosome encoding; digital media applications; high level synthesis; integrated allocation; integrated binding; integrated scheduling; multistructure topology; novel cost value metric; novel genetic algorithm based exploration approach; novel merit score technique; parallel implementation logic; performance-hardware area tradeoffs; pipelined performance-hardware area constraints; serial implementation logic; Biological cells; Clocks; Cost function; Encoding; Genetic algorithms; Oscillators; Resource management; Integrated Exploration; efficiency; execution time; genetic algorithm; pipelined data;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical and Computer Engineering (CCECE), 2011 24th Canadian Conference on
  • Conference_Location
    Niagara Falls, ON
  • ISSN
    0840-7789
  • Print_ISBN
    978-1-4244-9788-1
  • Electronic_ISBN
    0840-7789
  • Type

    conf

  • DOI
    10.1109/CCECE.2011.6030508
  • Filename
    6030508