Optimised Application Specific Architecture Generation and Mapping Approach for Heterogeneous 3D Networks-on-Chip

Heterogeneous architectures have emerged to combine 2D routers and 3D routers in NoCs producing 3D NoCs with lower area and power consumption while maintaining the performance of homogeneous 3D NoCs. An efficient application mapping on heterogeneous 3D NoCs can be complex. However, application mapping has a great impact on the performance, reliability and energy consumption of NoCs. This paper presents an energy and reliability aware multi-application mapping algorithm for heterogeneous 3D NoCs. The algorithm has been evaluated and compared with existing mapping algorithms including heuristics (CastNet, Onyx and Nmap), semi-exhaustive (Branch-and-Bound) and random mapping techniques with various realistic traffic patterns. Experimental results show NoCs mapped with the proposed algorithm have lower energy consumption and significant reduction in packet delays compared to the existing algorithms.