DocumentCode
3461449
Title
The ephemeral history register: flexible scheduling for rule-based designs
Author
Rosenband, Daniel L.
Author_Institution
Comput. Sci. & Artificial Intelligence Lab, Massachusetts Inst. of Technol., Cambridge, MA, USA
fYear
2004
fDate
23-25 June 2004
Firstpage
189
Lastpage
198
Abstract
The quality of high-level synthesis results is strongly dependant on the concurrency that can be found in designs. In this paper we introduce the ephemeral history register (EHR), a new primitive state element that enables concurrent scheduling of arbitrary rules in a rule-based design framework. The key properties of the EHR are that it allows multiple operations to write to the same state simultaneously, and that the EHR maintains a history of all writes that occur within a clock-cycle. Using the EHR, we present an algorithm that takes as input a design and a desired schedule, and produces a functionally equivalent design that satisfies the desired concurrency and ordering of operations. A processor pipeline is used to illustrate the effectiveness of the EHR and scheduling algorithm, and shows how this approach significantly improves on previous synthesis algorithms for rule-based designs.
Keywords
high level synthesis; scheduling; concurrent scheduling; ephemeral history register; processor pipeline; rule-based designs; Algorithm design and analysis; Clocks; Computer science; Concurrent computing; Hardware; History; Process design; Processor scheduling; Registers; Scheduling algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Formal Methods and Models for Co-Design, 2004. MEMOCODE '04. Proceedings. Second ACM and IEEE International Conference on
Print_ISBN
0-7803-8509-8
Type
conf
DOI
10.1109/MEMCOD.2004.1459853
Filename
1459853
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