Single-phase source-coupled adiabatic logic

Adiabatic circuits offer a promising alternative to conventional circuitry for low energy design. Their operation is nevertheless subject to fundamental energy-speed trade-offs, just like any other physical realization of boolean logic. Thus, adiabatic circuits with very low energy consumption at low frequencies fail to function at high operating frequencies. Conversely, high-speed adiabatic circuits tend to be dissipative at low clock rates. This paper describes SCAL, a single-phase source-coupled adiabatic logic family that operates efficiently across a wide range of operating frequencies. In layout-based simulations with 0.5 /spl mu/m CMOS process parameters, pipelined carry-lookahead adders developed in our logic function correctly from 10 MHz up to 280 MHz. Our SCAL adders are less dissipative than corresponding designs in alternative adiabatic families that remain functional across the same frequency range. Moreover, they are about as dissipative as other adiabatic circuits that are geared towards very efficient operation at low frequencies. In comparison with their CMOS counterparts, our SCAL adders are 3 to 10 times more energy efficient.