Self-timed MESFET gallium arsenide circuit techniques for a direct digital frequency synthesiser

Frequency synthesisers are the key to precise time, frequency and phase in communications transmitters and receivers as well as in radar pulse compression. Digital implementations such as direct digital synthesis (DDS) are frequently selected because of their inherent advantages. Limiting factors are the spurious frequencies, which are generated due to quantisation effects and an output frequency limited to less than half of the sampling frequency according to the sampling theorem and taking into account a realisable anti-image filter. The fundamental part of any DDS architecture is a periodically overflowing phase-accumulator generating linearly increasing phase values. In this paper we review an efficient self-timed highly-pipelined accumulator architecture implemented in GaAs MESFET technology