A 14-/spl mu/A 3-ppm//spl deg/C CMOS bandgap voltage reference

Author

Yao, Chunhua ; Liu, Boan ; Xia, Yuwen

Author_Institution

Inst. of Microelectron., Tsinghua Univ., Beijing

Volume

1

fYear

2005

fDate

24-0 Oct. 2005

Firstpage

503

Lastpage

506

Abstract

The work presented in this paper improves on a high order curvature-compensated CMOS band-gap reference circuit design. A cascoded current mirror is utilized in order to increase the bandgap voltage´s power supply rejection ratio (PSRR) and decrease the mismatch current. A source follower is inserted in series with the capacitor to guarantee the system stable. Simulated in the standard 0.18mum CMOS technology, the proposed voltage reference can operate down to 1.5V supply and consumes supply current of 14muA. A temperature coefficient of 3-ppm/degC is achieved through the temperature-dependent resistor ratio

Keywords

CMOS integrated circuits; current mirrors; integrated circuit design; power supply circuits; reference circuits; 0.18 micron; 1.5 V; 14 muA; CMOS bandgap reference circuit; cascoded current mirror; curvature compensation; frequency compensation; mismatch current; power supply rejection ratio; temperature-dependent resistor ratio; CMOS technology; Capacitors; Circuit simulation; Circuit synthesis; Current supplies; Mirrors; Photonic band gap; Power supplies; Temperature; Voltage; CMOS bandgap reference; PSRR; curvature compensation; frequency compensation; temperature-dependent resistor ration;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2005. ASICON 2005. 6th International Conference On

Conference_Location

Shanghai

Print_ISBN

0-7803-9210-8

Type

conf

DOI

10.1109/ICASIC.2005.1611366

Filename

1611366